SRAM is a type of electronic memory used in ICs to store data. An SRAM cell can be written to or read from. Generally, an SRAM cell provides a voltage at an output port that is sensed by a sense amplifier that senses whether the voltage held in the SRAM represents a digital value of 1 or a digital value of 0. Some SRAMs have a single port used to both write data in and read data out. Other SRAMs have dual ports which can be used in a variety of ways and for various purposes. In some ICs, dual port SRAM cells may be operated in single-port or in dual-port mode.
One mode of operating a dual port SRAM allows a READ operation to occur at one or both ports while a READ/WRITE operation occurs at one port during the same clock cycle. Such operation is commonly called a READ-first operation or READ-first mode. As IC geometries and operating voltage levels have been reduced, the voltage margins for READ and WRITE operations have also become smaller. Similarly, as operating speeds have increased, timing margins have also become smaller.
In dual port SRAM with sufficient timing and voltage margins, READ-first operation has operated reliably. However, as timing and voltage margins have been reduced, operational errors have occurred. One type of error is that the WRITE operation does not achieve a sufficiently high voltage level in the SRAM cell by the end of the clock cycle to accurately represent the intended data state.
One approach that has been used to address WRITE margin errors has been to increase the current available to the bitlines, basically, to drive the SRAM cell harder. This approach is not feasible in a single power supply architecture where no latency is allowed during read/write operations. Techniques for improving WRITE margins in READ-first operation of dual port SRAM that avoid the disadvantages of the prior art are desirable.